In the Generic Interrupt Controller (GIC) architecture, which of the following ID numbers are reserved for interrupts that are private to a CPU interface?
A. ID0-ID7
B. ID0-ID15
C. ID0-ID31
D. ID0-ID63
An interrupt handler contains the following instruction sequence at the end. The purpose of these instructions is to clear the interrupt request in the interrupt controller and then safely re-enable interrupts.
STR r0, [r1] ; write to interrupt controller register to clear interrupt request
controller sees the write before interrupts are re-enabled?
A. DMB
B. DSB
C. ISB
D. NOP
The Cortex-A9 MPCore processor contains a hardware block whose function is to maintain data cache coherency between cores. What is the name of this block?
A. Shareable Memory
B. Snoop Control Unit
C. Private Memory Region
D. Level 2 Cache Controller
When using an Operating System, which instruction is used by user code to request a service from the kernel?
A. BLX
B. RFEFD
C. SRSFD
D. SVC
What are the values of the NZCV bits in the CPSR after executing the following instructions? LDR R0, = 0xFFFFFFFF
ADDS R0, R0, #1
A. 0101
B. 0110
C. 1001
D. 1010
In which TWO of the following locations would a compiler typically place local variables? (Choose two)
A. ROM
B. Heap
C. Cache
D. Registers
E. Stack
Optimizing for space will:
A. Produce an image which is decompressed at run-time.
B. Cause the compiler to unroll loops where possible.
C. Result in more functions being inlined by the compiler.
D. Produce smaller code, even if this results in slower execution.
Which of these C99 keywords can be used to indicate that two arrays do not overlap?
A. "pure"
B. "volatile"
C. "static"
D. "restrict"
Which of the following is TRUE for dynamically linked executables?
A. They can contain unresolved relocations
B. They contain the code and data for all libraries they use
C. They are larger than an equivalent statically linked application
D. They are designed to be run standalone with no other supporting software
Which of the following pairs of statements about the difference between a Memory Management Unit (MMU) and a Memory Protection Unit (MPU) is correct?
A. The MMU uses translation tables. The MPU does not use translation tables.
B. The MMU uses only physical addresses. The MPU translates virtual addresses to physical addresses.
C. The MMU defines cacheability attributes for memory. The MPU does not define cacheability attributes for memory.
D. The MMU defines access permissions for memory. The MPU does not define access permissions for regions of memory.